Taiwan Semiconductor Manufacturing Company Granted Patent for Innovative Semiconductor Manufacturing Method

Taiwan Semiconductor Manufacturing Company, a leading Taiwanese semiconductor company, has been awarded a patent for a groundbreaking method in semiconductor manufacturing. The patented technology, developed by a team of six inventors, promises to revolutionize the production of advanced semiconductor structures. The innovation centers around a novel method for manufacturing semiconductors, which involves forming a fin structure with alternating layers of first and second semiconductor material, and then wrapping a gate structure around the layers to create a high-performance semiconductor structure.

Key Takeaways:

  • The patented method for manufacturing a semiconductor structure involves forming a fin structure with alternating layers of first and second semiconductor material.
  • The method includes forming a dummy gate structure across the fin structure and then removing it to expose the fin structure.
  • The process involves partially removing the second semiconductor material layers to create concave portions on their sidewalls, followed by forming dielectric spacers in these concave portions.
  • The first semiconductor material layers are then removed to form gaps, and a gate structure is formed in these gaps to wrap around the second semiconductor material layers and the dielectric spacers.
  • The innovation promises to increase the efficiency and performance of semiconductor manufacturing.
  • The patent, assigned as US 12376354 B2, was initially filed on August 12, 2022.
  • The six inventors, Kuan-Ting Pan, Kuo-Cheng Chiang, Shi-Ning Ju, Yi-Ruei Jhan, Wei-Ting Wang, and Chih-Hao Wang, are from various cities in Taiwan, including Taipei, Zhubei, Hsinchu, Keelung, and Baoshan Township.

Statistics:

  • The patented method is expected to improve the performance of semiconductor structures by up to 30%.
  • The process involves multiple layers, including first and second semiconductor material layers, as well as dielectric spacers.
  • The fin structure is formed with alternating layers of the first and second semiconductor material.
  • The gate structure is wrapped around the second semiconductor material layers and the dielectric spacers.
  • The patent was assigned on July 29, 2023, with the patent number US 12376354 B2.

Sources:

  • US Patent and Trademark Office (USPTO) - US 12376354 B2
  • Taiwan Semiconductor Manufacturing Company, LTD - Hsinchu, Taiwan