Corollary Inc. Announces OEM Agreement with IBM, Incorporating C-bus II Technology into New SMP PC Server

Strategic Insights -

Corollary Inc., a leading developer of high-performance products, has announced an OEM agreement with IBM Corp. to incorporate the Corollary C-bus II architecture into IBM's new SMP PC server, the IBM PC Server 720. This product features the most advanced symmetric multiprocessing technology, based on the 400MB/second C-bus II technology and chip set. The C-bus II architecture provides a solid technology foundation for IBM's new line of PC Servers, contributing to their outstanding price/performance.

Key Takeaways:

  • Corollary Inc. has announced an OEM agreement with IBM Corp. to incorporate C-bus II technology into IBM's new SMP PC server, the IBM PC Server 720.
  • The IBM PC Server 720 features the most advanced symmetric multiprocessing technology, based on the 400MB/second C-bus II technology and chip set.
  • C-bus II is an open, fully symmetric multiprocessor bus architecture optimized for Pentium multiprocessor systems, providing a solid technology foundation for IBM's new line of PC Servers.
  • The Corollary C-bus II SIMPL (Symmetric Integrated Multiprocessor Logic) chip set is a highly integrated product that provides the cache controller, interrupt controller, and cache-coherent bus protocol required for a high-performance SMP system.
  • C-bus II includes features such as ECC memory protection, ECC protection for all bus transactions, and a fully associative level three cache to improve performance on level two cache misses.
  • The technology is supported under all major operating systems, including Microsoft Windows NT Server, Novell NetWare, and SCO UNIX.
  • Corollary Inc. is a leading developer of high-performance products that extend the power of Intel-based technology.
  • IBM joins six other manufacturers who have recently announced C-bus II technology relationships with Corollary, including Fujitsu Ltd., Hitachi Ltd., Intergraph Computer Systems, Olivetti, Samsung Electronics Co. Ltd., and SuperComputers International.

Statistics:

  • 400MB/second: the bandwidth offered by C-bus II technology and chip set.
  • 100MHz: the clock speed supported by up to eight Pentium processors in an SMP system based on C-bus II.
  • 6: the number of manufacturers who have recently announced C-bus II technology relationships with Corollary.
  • 8: the number of Pentium processors supported by C-bus II in an SMP system.

Sources:

  • Corollary Inc., developer of the C-bus II symmetric multiprocessing open standard bus and chip set
  • Business Wire, March 8, 1995