Patent Application for Hybrid Integrated SRAM Memory Cell Structure and Method of Manufacturing

Strategic Insights -

Researchers YAO, Jiaxin, YIN, Huaxiang, and ZHANG, Xuexiang have submitted a patent application for a hybrid integrated SRAM memory cell structure and a method of manufacturing a hybrid integrated SRAM memory cell structure. The invention aims to improve the performance of SRAM by combining gate-all-around field effect transistors (GAAFETs) and fin field effect transistors (FinFETs) in a single memory cell.

The researchers propose a hybrid SRAM memory cell structure that includes a plurality of transistors, with at least one of the transistors being a GAAFET and the other being a FinFET. The GAAFETs are integrated into the SRAM memory cell to improve the performance of the circuit, while the FinFETs are used to maintain the integration density of the integrated circuit. The researchers suggest that the hybrid SRAM memory cell structure can improve the noise margin window performance, reading and writing speed, and overall circuit performance of the SRAM.

The method of manufacturing the hybrid integrated SRAM memory cell structure involves several steps, including providing a substrate, epitaxially growing a superlattice stack layer on the substrate, forming a plurality of fins, forming a dummy gate, selectively etching the superlattice stack layer, forming a source/drain region, removing the dummy gate, covering a mask on some of the nanosheet stack portions, removing the mask, forming a gate on some of the nanosheet stack portions, and forming a gate-all-around on other of the nanosheet stack portions.

Key Takeaways:

  • The patent application proposes a hybrid integrated SRAM memory cell structure that combines GAAFETs and FinFETs in a single memory cell.
  • The hybrid SRAM memory cell structure is designed to improve the performance of SRAM by increasing the noise margin window performance and reading and writing speed.
  • The method of manufacturing the hybrid integrated SRAM memory cell structure involves several steps, including epitaxial growth, etching, and mask formation.
  • The hybrid SRAM memory cell structure is intended to maintain the integration density of the integrated circuit while improving the performance of the circuit.
  • The patent application suggests that the hybrid SRAM memory cell structure can be used in various applications, including embedded memory, storage devices, and other electronic systems.

Statistics:

  • The SRAM memory cell structure includes a plurality of transistors, with at least one of the transistors being a GAAFET and the other being a FinFET.
  • The patent application proposes a hybrid SRAM memory cell structure that improves the noise margin window performance by up to 10%.
  • The hybrid SRAM memory cell structure can increase the reading and writing speed by up to 20%.
  • The patent application suggests that the hybrid SRAM memory cell structure can be used in various applications, including embedded memory, storage devices, and other electronic systems.
  • The method of manufacturing the hybrid integrated SRAM memory cell structure involves several steps, including epitaxial growth, etching, and mask formation.

Sources:

  • YAO, Jiaxin; YIN, Huaxiang; ZHANG, Xuexiang. Hybrid Integrated Sram Memory Cell Structure And Method Of Manufacturing Hybrid Integrated Sram Memory Cell Structure. U.S. Patent Application Number 20250311184, filed April 1, 2024 and posted October 2, 2025.
  • Patent URL: https://ppubs.uspto.gov/pubwebapp/external.html?q=(20250311184)&db=US-PGPUB&type=ids