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Microsoft Corp.

Altera FPGAs Achieve Compelling Performance-per-Watt in Cloud Data Center Acceleration Using CNN Algorithms

Strategic Insights

— 2 min read

Altera Corporation's high-end FPGAs with hard floating point DSP blocks have demonstrated a significant leap forward in performance and power efficiency, according to a recent announcement by Microsoft's researchers. The company is utilizing Altera's Arria 10 FPGAs to achieve up to 40 GFLOPS-per-Watt in data center acceleration based on CNN algorithms. This innovative technology is being showcased at two industry events this week: in Monterey, California, and in San Jose, California.

Key Takeaways:

  • Microsoft researchers are using Altera Arria 10 FPGAs to achieve compelling performance-per-Watt in data center acceleration based on CNN algorithms, demonstrating up to 40 GFLOPS-per-Watt.
  • This performance offers a more than 3X performance-to-power advantage for CNN platforms compared to GPGPUs.
  • The open software development language OpenCL is being used to code the Arria 10 FPGA and its IEEE754 hard floating point DSP blocks.
  • The FPGA's architectural advantage for neural algorithms includes the ability to convolve and do pooling efficiently with a flexible data path, enabling many OpenCL kernels to pass data directly to each other without external memory.
  • The hard floating point DSP blocks in Arria 10 FPGAs support both multiplication and addition, enabling more logic and a faster clock speed than traditional FPGA products.
  • Microsoft is utilizing Altera's Stratix V FPGAs to accelerate search on its innovative Catapult board, which is being deployed in servers in the first Bing data center later this year.
  • Companies such as Bittware, Gidel, Nallatech, and ReFLEX CES are also leveraging Altera's Arria 10 FPGA products with on-board hard floating point DSP to achieve compelling performance-per-Watt.
  • Bittware's President, Jeff Milrod, emphasizes the benefits of native floating-point engines on Altera's Arria 10 devices, providing massive floating-point resources with tremendous ease-of-use and power efficiency.
  • Nallatech has ported several production codes that required floating point math to the Arria 10 FPGA, resulting in savings in logic resource usage, increased clock frequencies, and improved performance/watt metrics.
  • ReFLEX CES is targeting a significant GFLOPS/W ratio increase (ratio of three is expected) with its newly-released FPGA boards based on Altera Arria10 FPGAs.

Statistics:

  • 40 GFLOPS-per-Watt: the performance level achieved by Microsoft researchers using Altera Arria 10 FPGAs in data center acceleration based on CNN algorithms.
  • 3X: the performance-to-power advantage of CNN platforms using Altera Arria 10 FPGAs compared to GPGPUs.
  • 20 nm: the process node used by Altera's high-end FPGAs with hard floating point DSP blocks.
  • 3: the expected GFLOPS/W ratio increase with the ReFLEX CES's newly-released FPGA boards based on Altera Arria10 FPGAs.

Sources:

  • Altera Corporation. "Altera FPGAs Achieve Compelling Performance-per-Watt in Cloud Data Center Acceleration Using CNN Algorithms" [Online]. 23 Feb. 2015. PR Newswire.
  • Bittware Corporation. "Bittware's Arria 10-based solutions provide more than 40 GFLOPS/W for HPC and acceleration applications."
  • Gidel Ltd. "Gidel's FPGA development and production solutions are optimized for Altera FPGAs"
  • Nallatech Corporation. "Nallatech accelerates floating point heavy applications with Altera's latest FPGA architecture"
  • ReFLEX CES. "ReFLEX CES accelerates high performance computing applications with Altera's latest FPGAs"

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