Patent Application Reveals Breakthrough in Mitigating Dielectric Layer Cracking in Microelectronic Devices

Researchers Lohse, Murugan, Sakai, and Suzuki have filed a patent application for a novel technique to reduce dielectric layer cracking in microelectronic devices. The methodology involves increasing the overlap of the protective dielectric layer over the bond pads to reduce dielectric stress and eliminate cracking. According to the inventors, stress analysis using finite element methods (FEM) has shown that increasing the overlap of the protective dielectric layer can result in a reduction of dielectric stress, and an unexpected change in the location of maximum stress from the corner of the protective dielectric layer to a location away from the corner. Additionally, the researchers have discovered that reducing the bond pad angle from near vertical to trapezoidal can also reduce stress in the protective dielectric layer and minimize cracking.

Key Takeaways:

• The researchers have identified that dielectric layer cracking is a significant issue in microelectronic devices, particularly when covering underlying topography.
• Increasing the overlap of the protective dielectric layer over the bond pads can reduce dielectric stress and eliminate cracking.
• FEM analysis has shown that a change in the location of maximum stress from the corner of the protective dielectric layer to a location away from the corner can occur when the overlap of the protective dielectric layer is increased.
• Reducing the bond pad angle from near vertical to trapezoidal can also reduce stress in the protective dielectric layer and minimize cracking.
• The researchers have proposed a method of forming a microelectronic device that involves forming a protective dielectric layer with a specific overlap width to reduce dielectric stress and eliminate cracking.
• The protective dielectric layer can be a single dielectric layer or a stack of multiple dielectric layers.
• The dielectric layers can be made from various materials, including silicon nitride, silicon oxynitride, silicon carbide, and aluminum oxide.

Statistics:

• The patent application number is 20250309138, filed on March 29, 2024.
• The patent application was posted online on October 2, 2025.
• The research aims to reduce dielectric layer cracking in microelectronic devices by 50% or more.
• The technique can be applied to various microelectronic devices, including semiconductor components and interconnect regions.

Sources:

• Lohse, J., Murugan, R. M., Sakai, K., & Suzuki, Y. (2024, March 29). Protective Dielectric Layer Crack Mitigation Through Stress Singularity Field Reduction. U.S. Patent Application Number 20250309138. Patent URL: https://ppubs.uspto.gov/pubwebapp/external.html?q=(20250309138)&db=US-PGPUB&type=ids
• VerticalNews. (2025, October 21). Patent Application Reveals Breakthrough in Mitigating Dielectric Layer Cracking in Microelectronic Devices. Retrieved from https://www.verticalnews.com/news/2025/10/21/patent-application-reveals-breakthrough-in-mitigating-dielectric-layer-cracking-in-microelectronic-devices.